Articles et présentations

ARM Developers' Conference 2008

At the ARM Developers' Conference 2008, Rambus Director of Marketing, Michael Ching, outlined the memory architecture trends and system bandwidth requirements for designing SoCs for high-definition consumer applications.

Presentations

•  Memory Architectures For High Definition Consumer Devices

HOT CHIPS 20

HOT CHIPS is an annual symposium on high-performance chips that is sponsored by the IEEE Technical Committee on Microprocessors and Microcomputers. Rambus was proud to be a Gold sponsor and present the following:

Presentations

•  Terabyte Bandwidth Initiative: Architectural Considerations for Next-Generation Memory Systems

MemCon 2008

MemCon is the largest worldwide conference and exhibition addressing the business, technology, and system design strategies for semiconductor memory and storage. Rambus was proud to be a Platinum sponsor of MemCon and present:

Webcasts

• The Next Generation of Mobile Memory
• Memory System Challenges in the Multi-Core Era

Presentations

•  The Next Generation of Mobile Memory
•  Memory System Challenges in the Multi-Core Era

Agilent Digital Seminar Japan 2008

Yoshihito Koya, Rambus Marketing Manager, presented the following at Agilent Digital Seminar Japan 2008.

Presentations

•  デジタルコンシューマアプリケーション向けXDR™ DRAMの優位性

Rambus Design Seminar Hsinchu 2008

Rambus Design Seminar Taiwan explored the future of high-performance memory designs:

• Types of memory systems required for next generation consumer applications and how these advanced memory systems will solve tomorrow's system challenges
• Innovative techniques developed by Rambus to improve memory performance and reduce overall system costs
• Solutions to multi-GHz memory designs
• Rambus' latest development initiative, the Terabyte Bandwidth Initiative, which enables 1 TB/s of memory bandwidth performance into a single SoC

Presentations

•  Rambus Memory Technologies Update
•  Qimonda XDR™ DRAM
•  Elpida DRAM Solutions to Advanced Digital Consumer Electronic Systems
•  Terabyte Bandwidth Initiative
•  XDR™ Memory Architecture for Next Generation Consumer Products
•  XDR™ Package/PCB Design & XIO Emulation
•  Validation of DDR and XDR™ Designs
•  High Frequency Signal Integrity Analysis

DVCon 2008

DVCon is the premier conference for functional design and verification of digital electronic systems. Rambus was proud to present the following papers at DVCon 2008.

Papers

•  Functional Verification in the Presence of Linear Analog Circuits
•  CoverMore: A Methodology to deliver re-usable and verifiable design IP

Rambus Design Seminar Bangalore 2008

Rambus Design Seminar Bangalore explored the future of high-performance memory designs:

• Types of memory systems required for next generation consumer applications and how these advanced memory systems will solve tomorrow's system challenges
• Innovative techniques developed by Rambus to improve memory performance and reduce overall system costs
• Rambus' latest development initiative, the Terabyte Bandwidth Initiative, which enables 1 TB/s of memory bandwidth performance into a single SoC

Presentations

•  The Evolution of Memory Architecture: The Era of Throughput Memory
•  XDR™/XDR2 & Memory Requirements for Next Generation Consumer Products
•  Solving System Engineering Challenges in High Speed Memory Designs
•  Rambus DDR2/3 Memory Controller
•  Terabyte Bandwidth Initiative: Architectural Considerations for Next-Generation Memory Systems

DesignCon 2008

DesignCon is Silicon Valley's premier conference and technology exhibition for the semiconductor and electronic design engineering communities. Rambus was proud to be the Corporate Partner for DesignCon 2008 and present the following papers.

Papers

•  In Situ Characterization of High Speed Signaling Systems with On Chip Measurements
•  How to find if my Checker is Complete and Exhaustive?
•  Study of Signal and Power Integrity Challenges in High-Speed Memory I/O Designs Using Single-Ended Signaling Schemes
•  Half-Rate Decision-Feedback Equalization – Di-Bit Response Analysis and Evaluation
•  Analyzing the Impact of Simultaneous Switching Noise on System Margin in Gigabit Single-Ended Memory Systems
•  Mixed-Signal Integration: Functional Verification in the Presence of Linear Analog Components

International Conference on VLSI Design and Embedded Systems 2008

This joint-conference is a forum for researchers and designers to present and discuss various aspects of VLSI design, electronic design automation (EDA), enabling technologies, and embedded systems. It covers the entire spectrum of activities in the two vital areas of VLSI and embedded systems, which underpin the semiconductor industry. Rambus was proud to be a Gold sponsor and present the following.

Presentations

•  Memory Requirements in Next-generation Designs
•  High-performance Memory for Next-generation Electronic Systems